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FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
NULL COMMANDS
This command is sent by sending binary 000x xxxx data. This can be used to read IC status in the SPI return word. Message
000x xx00 reads Status Register 0. Message 000x xx01 through 000x xx11 read additional internal registers.
Table 8. NULL Commands
SPI Data Bits
Write
7
0
6
0
5
0
4
x
3
x
2
x
1
0
0
0
Reset
NULL Commands are described in detail in the STATUS REGISTERS section of this document.
MASK Command
This is the mask for interrupts. A bit set to “1” enables the corresponding interrupt. Because of the number of MASK bits, this
register is in two portions:
1. MASK0
2. MASK1
Both are accessed with 0010 xxxx and 0011 xxxx patterns respectively. Figure 18 illustrates how interrupts are enabled and
faults cleared.
CLINT0 and CLINT1 have the same format as MASK0 and MASK1 respectively, but the action is to clear the interrupt latch
and status register 0 bit corresponding to the lower nibble of the command.
Table 9. MASK0 Register
SPI Data Bits
Write
7
0
6
0
5
1
4
0
3
x
2
x
1
x
0
x
Reset
1
1
1
1
INTERRUPT HANDLING
To Status Register
From MASKx:N Register
Various Faults
From Clint Command
INT Source
INT Clear
S
Latch
R
Fault
net N
INT
net 0
Figure 18. Interrupt Handling
Table 10. MASK1 Register
SPI Data Bits
Write
7
0
6
0
5
1
4
1
3
x
2
x
1
x
0
x
Reset
1
1
1
1
33937A
Analog Integrated Circuit Device Data
32
Freescale Semiconductor
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